#include <stdlib.h>#include <string.h>#include <unistd.h>#include <stdio.h>#include <sys/time.h>#include "dbg_msg.h"#include "jt_arm.h"#include "jt_instr.h"#include "convert.h"EmbeddedICE or ICE-RT interface for ARM7TDMI / ARM9TDMI
Note: We support ARM7TDMI and ARM9TDMI only.
At chain 2 ARM7TDMI and ARM9TDMI cores both have an embedded-ICE programming unit.
The length is 38 bits and the layout is similar but the behaviour is not exactly equal.
The ARM10TDMI core does not have this kind of unit at chain 2. (It's using a different mechanism.)
| unsigned int jtag_arm_IceRT_RegRead | ( | int | nreg | ) |
Read register number nreg from ICE-RT.
| nreg | register number |
References DBG_LEVEL_JTAG_ICERT_LOW, dbgPrintf(), ICERT_REG_DCC_CONTROL, ICERT_REG_DEBUG_STATUS, instr_intest, INTEST, jtag_arm_set_chain(), jtag_exchange_data(), jtag_send_instr(), jtag_supp_bitstr2int_MSB_First(), jtag_supp_int2bitstr_MSB_First(), transaction::parameter, scan_chain, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), and transaction::uplevel.
Referenced by atmelFlashClearGPNVM(), atmelFlashErase(), atmelFlashEraseAndProgram(), atmelFlashLock(), atmelFlashProgramOnly(), atmelFlashSetGPNVM(), atmelFlashUnlock(), gdb_check_memory_block(), gdb_dcc_dummy(), gdb_read_memory_block(), gdb_writeback_memory_block(), jtag_arm_chain1_sysspeed_restart(), jtag_arm_IceRT_disable_Intr(), jtag_arm_IceRT_enable_Intr(), jtag_arm_iceRT_PollDbgState(), jtag_arm_IceRT_PutAnyBreakPoint(), jtag_arm_IceRT_version(), jtag_arm_Mointor2DebugMode(), jtag_arm_ReadCpuRegs(), jtag_arm_ResynchStep(), jtag_arm_ShowAllIceRT_Regs(), jtag_arm_Step(), jtag_test(), philipsFlashEraseAllUnlocked(), philipsFlashLock(), philipsFlashProgram(), philipsFlashUnlock(), prog_flash_amd16(), prog_flash_amd32(), prog_flash_amd8(), str7FlashErase(), str7FlashProgram(), str9FlashErase(), and str9FlashProgram().
| unsigned int jtag_arm_IceRT_RegRead_Once | ( | int | nreg | ) |
Read previous requested register number from ICE-RT. and insert a request register number nreg for next time.
| nreg | register number |
References DBG_LEVEL_JTAG_ICERT_LOW, dbgPrintf(), instr_intest, INTEST, jtag_arm_set_chain(), jtag_exchange_data(), jtag_send_instr(), jtag_supp_bitstr2int_MSB_First(), jtag_supp_int2bitstr_MSB_First(), transaction::parameter, scan_chain, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), and transaction::uplevel.
Referenced by atmelFlashClearGPNVM(), atmelFlashErase(), atmelFlashEraseAndProgram(), atmelFlashLock(), atmelFlashProgramOnly(), atmelFlashSetGPNVM(), atmelFlashUnlock(), gdb_check_memory_block(), gdb_dcc_dummy(), gdb_read_memory_block(), gdb_writeback_memory_block(), philipsFlashEraseAllUnlocked(), philipsFlashLock(), philipsFlashProgram(), philipsFlashUnlock(), prog_flash_amd16(), prog_flash_amd32(), prog_flash_amd8(), str7FlashErase(), str7FlashProgram(), str9FlashErase(), and str9FlashProgram().
| void jtag_arm_IceRT_RegWrite | ( | int | nreg, | |
| unsigned int | regdata | |||
| ) |
Write data into register number nreg of ICE-RT.
| nreg | register number | |
| regdata | data to write |
References DBG_LEVEL_JTAG_ICERT_LOW, DBG_LEVEL_JTAG_INSTR, dbgPrintf(), IF_DBG, instr_intest, INTEST, jtag_arm_set_chain(), jtag_exchange_data(), jtag_send_instr(), jtag_supp_int2bitstr_MSB_First(), and scan_chain.
Referenced by atmelFlashClearGPNVM(), atmelFlashErase(), atmelFlashEraseAndProgram(), atmelFlashLock(), atmelFlashProgramOnly(), atmelFlashSetGPNVM(), atmelFlashUnlock(), gdb_check_memory_block(), gdb_dcc_dummy(), gdb_read_memory_block(), gdb_writeback_memory_block(), jtag_arm_enterMonitorMode(), jtag_arm_FinalExitDebug(), jtag_arm_IceRT_ClearAnyBreakPoint(), jtag_arm_IceRT_disable_Intr(), jtag_arm_IceRT_enable_Intr(), jtag_arm_iceRT_PollDbgState(), jtag_arm_IceRT_PutAnyBreakPoint(), jtag_arm_IceRT_PutHWBreakPoint0(), jtag_arm_IceRT_PutHWBreakPoint1(), jtag_arm_IceRT_PutSWBreakPoint0(), jtag_arm_IceRT_PutSWBreakPoint1(), jtag_arm_IceRT_PutWatchPoint0(), jtag_arm_IceRT_PutWatchPoint1(), jtag_arm_iceRT_StopRunningProgram(), jtag_arm_Mointor2DebugMode(), jtag_test(), philipsFlashEraseAllUnlocked(), philipsFlashLock(), philipsFlashProgram(), philipsFlashUnlock(), prog_flash_amd16(), prog_flash_amd32(), prog_flash_amd8(), str7FlashErase(), str7FlashProgram(), str9FlashErase(), and str9FlashProgram().
| unsigned int jtag_arm_IceRT_RegWrite_getPrevData | ( | int | nreg, | |
| unsigned int | regdata | |||
| ) |
Write data into register number nreg of ICE-RT.
| nreg | register number | |
| regdata | data to write |
References instr_intest, INTEST, jtag_arm_set_chain(), jtag_exchange_data(), jtag_send_instr(), jtag_supp_bitstr2int_MSB_First(), jtag_supp_int2bitstr_MSB_First(), transaction::parameter, scan_chain, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), and transaction::uplevel.
| void jtag_arm_ShowAllIceRT_Regs | ( | void | ) |
Print all ICE-RT registers to screen (or stdout of server)
| - |
References DBG_LEVEL_JTAG_ICERT, ICERT_REG_ABORT_STATUS, ICERT_REG_DCC_CONTROL, ICERT_REG_DCC_DATA, ICERT_REG_DEBUG_CONTROL, ICERT_REG_DEBUG_STATUS, ICERT_REG_VECTOR_CATCH, ICERT_REG_WATCHPOINT_0_ADDRESS, ICERT_REG_WATCHPOINT_0_ADDRMASK, ICERT_REG_WATCHPOINT_0_CONTROL, ICERT_REG_WATCHPOINT_0_CONTROLMASK, ICERT_REG_WATCHPOINT_0_DATA, ICERT_REG_WATCHPOINT_0_DATAMASK, ICERT_REG_WATCHPOINT_1_ADDRESS, ICERT_REG_WATCHPOINT_1_ADDRMASK, ICERT_REG_WATCHPOINT_1_CONTROL, ICERT_REG_WATCHPOINT_1_CONTROLMASK, ICERT_REG_WATCHPOINT_1_DATA, ICERT_REG_WATCHPOINT_1_DATAMASK, IF_DBG, and jtag_arm_IceRT_RegRead().
Referenced by gdb_main_loop(), and jtag_test().
| unsigned int jtag_arm_iceRT_PollDbgState | ( | void | ) |
Poll debug state
| 0 | CPU is running | |
| 1 | CPU is in debug state |
References DBG_LEVEL_GDB_ARM_INFO, DBG_LEVEL_JTAG_ARM, DBG_LEVEL_JTAG_ICERT, DBG_LEVEL_JTAG_ICERT_LOW, dbgPrintf(), error_exit_code, ICERT_REG_ABORT_STATUS, ICERT_REG_DCC_CONTROL, ICERT_REG_DCC_DATA, ICERT_REG_DEBUG_CONTROL, ICERT_REG_DEBUG_STATUS, ICESTATE_DCC_BUFFER_DEQUEUE, ICESTATE_DCC_BUFFER_INQUEUE, ICESTATE_DCC_BUFFER_IS_EMPTY, jtag_arm_IceRT_RegRead(), and jtag_arm_IceRT_RegWrite().
Referenced by jtag_arm_PollDbgState().
| int jtag_arm_iceRT_StopRunningProgram | ( | void | ) |
Send ICE-RT a manual debug request to stop the running program.
| - |
References ICERT_REG_DEBUG_CONTROL, jtag_arm_IceRT_RegWrite(), and jtag_eos().
| int jtag_arm_IceRT_version | ( | void | ) |
Read out the ICE-RT version (and the save version number in arm_info.ice_revision).
| - |
References DBG_LEVEL_GDB_ARM_INFO, dbgPrintf(), ICERT_REG_DCC_CONTROL, and jtag_arm_IceRT_RegRead().
Referenced by gdb_restart().
| void jtag_arm_IceRT_PutAnyBreakPoint | ( | void | ) |
Setup the ICE-RT to generate a breakpoint signal on any instruction address.
| - |
References convertDiffTimeToMsec, DBG_LEVEL_JTAG_ICERT, DBG_LEVEL_JTAG_ICERT_LOW, dbgPrintf(), error_exit_code, ICERT_REG_DEBUG_CONTROL, ICERT_REG_DEBUG_STATUS, ICERT_REG_WATCHPOINT_0_ADDRESS, ICERT_REG_WATCHPOINT_0_ADDRMASK, ICERT_REG_WATCHPOINT_0_CONTROL, ICERT_REG_WATCHPOINT_0_CONTROLMASK, ICERT_REG_WATCHPOINT_0_DATAMASK, ICERT_REG_WATCHPOINT_1_CONTROL, jtag_arm_IceRT_RegRead(), jtag_arm_IceRT_RegWrite(), jtag_eos(), transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, icert::watchpoint0, and icert::watchpoint1.
Referenced by jtag_arm_PrepareEnterDebug(), and jtag_test().
| void jtag_arm_IceRT_PutHWBreakPoint0 | ( | uint32_t | addr | ) |
Program first Watch/Breakpoint register to break on given address.
| addr | hardware address to break on |
References DBG_LEVEL_GDB_ARM_WARN, dbgPrintf(), ICERT_REG_WATCHPOINT_0_ADDRESS, ICERT_REG_WATCHPOINT_0_ADDRMASK, ICERT_REG_WATCHPOINT_0_CONTROL, ICERT_REG_WATCHPOINT_0_CONTROLMASK, ICERT_REG_WATCHPOINT_0_DATAMASK, jtag_arm_IceRT_RegWrite(), transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, and icert::watchpoint0.
Referenced by gdbSetupJtagTarget_Breakpoint().
| void jtag_arm_IceRT_PutHWBreakPoint1 | ( | uint32_t | addr | ) |
Program second Watch/Breakpoint register to break on given address.
| addr | hardware address to break on |
References DBG_LEVEL_GDB_ARM_WARN, dbgPrintf(), ICERT_REG_WATCHPOINT_1_ADDRESS, ICERT_REG_WATCHPOINT_1_ADDRMASK, ICERT_REG_WATCHPOINT_1_CONTROL, ICERT_REG_WATCHPOINT_1_CONTROLMASK, ICERT_REG_WATCHPOINT_1_DATAMASK, jtag_arm_IceRT_RegWrite(), transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, and icert::watchpoint1.
Referenced by gdbSetupJtagTarget_Breakpoint().
| void jtag_arm_IceRT_PutSWBreakPoint0 | ( | void | ) |
Program first Watch/Breakpoint register to break if an Soft-Break instruction should be executed. (using 0xB710B710 as ARM Software break and 0xB710 as THUMB Software break).
| - |
References DBG_LEVEL_GDB_ARM_WARN, dbgPrintf(), ICERT_REG_WATCHPOINT_0_ADDRMASK, ICERT_REG_WATCHPOINT_0_CONTROL, ICERT_REG_WATCHPOINT_0_CONTROLMASK, ICERT_REG_WATCHPOINT_0_DATA, ICERT_REG_WATCHPOINT_0_DATAMASK, jtag_arm_IceRT_RegWrite(), transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, and icert::watchpoint0.
Referenced by gdbSetupJtagTarget_Breakpoint().
| void jtag_arm_IceRT_PutSWBreakPoint1 | ( | void | ) |
Program second Watch/Breakpoint register to break if an Soft-Break instruction should be executed. (using 0xB710B710 as ARM Software break and 0xB710 as THUMB Software break).
| - |
References DBG_LEVEL_GDB_ARM_WARN, dbgPrintf(), ICERT_REG_WATCHPOINT_1_ADDRMASK, ICERT_REG_WATCHPOINT_1_CONTROL, ICERT_REG_WATCHPOINT_1_CONTROLMASK, ICERT_REG_WATCHPOINT_1_DATA, ICERT_REG_WATCHPOINT_1_DATAMASK, jtag_arm_IceRT_RegWrite(), transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, and icert::watchpoint1.
Referenced by gdbSetupJtagTarget_Breakpoint().
| void jtag_arm_IceRT_PutWatchPoint0 | ( | uint32_t | addr, | |
| int | len, | |||
| int | access | |||
| ) |
Program first Watchpoint register to break if Read/Write access on given address.
| addr | hardware address to watch (should be word aligned) | |
| len | number of bytes to watch (round up to power of 2; at least =4 then 8,16,32..) | |
| access | Write access(=1); Read access(=2); Read/Write access (=3) |
References DBG_LEVEL_GDB_ARM_WARN, dbgPrintf(), ICERT_REG_WATCHPOINT_0_ADDRESS, ICERT_REG_WATCHPOINT_0_ADDRMASK, ICERT_REG_WATCHPOINT_0_CONTROL, ICERT_REG_WATCHPOINT_0_CONTROLMASK, ICERT_REG_WATCHPOINT_0_DATAMASK, jtag_arm_IceRT_RegWrite(), transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, and icert::watchpoint0.
Referenced by gdbSetupJtagTarget_Breakpoint().
| void jtag_arm_IceRT_PutWatchPoint1 | ( | uint32_t | addr, | |
| int | len, | |||
| int | access | |||
| ) |
Program second Watchpoint register to break if Read/Write access on given address.
| addr | hardware address to watch (should be word aligned) | |
| len | number of bytes to watch (round up to power of 2; at least =4 then 8,16,32..) | |
| access | Write access(=1); Read access(=2); Read/Write access (=3) |
References DBG_LEVEL_GDB_ARM_WARN, dbgPrintf(), ICERT_REG_WATCHPOINT_1_ADDRESS, ICERT_REG_WATCHPOINT_1_ADDRMASK, ICERT_REG_WATCHPOINT_1_CONTROL, ICERT_REG_WATCHPOINT_1_CONTROLMASK, ICERT_REG_WATCHPOINT_1_DATAMASK, jtag_arm_IceRT_RegWrite(), transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, and icert::watchpoint1.
Referenced by gdbSetupJtagTarget_Breakpoint().
| void jtag_arm_IceRT_disable_Intr | ( | void | ) |
Disable Interrupt using ICE-RT
| - |
References ICERT_REG_DEBUG_CONTROL, jtag_arm_IceRT_RegRead(), and jtag_arm_IceRT_RegWrite().
| void jtag_arm_IceRT_enable_Intr | ( | void | ) |
Enable Interrupt using ICE-RT
| - |
References ICERT_REG_DEBUG_CONTROL, jtag_arm_IceRT_RegRead(), and jtag_arm_IceRT_RegWrite().
Referenced by gdb_action_step().
| void jtag_arm_IceRT_ClearAnyBreakPoint | ( | void | ) |
Disable any enabled breakpoint
| - |
References ICERT_REG_WATCHPOINT_0_CONTROL, ICERT_REG_WATCHPOINT_1_CONTROL, jtag_arm_IceRT_RegWrite(), transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, icert::watchpoint0, and icert::watchpoint1.
Referenced by jtag_arm_ClearAnyBreakPoint(), jtag_arm_PrepareExitDebug(), and jtag_arm_RunProgram().
| void jtag_arm_enterMonitorMode | ( | void | ) |
Disable any enabled breakpoint and enter monitor mode
| - |
References DBG_LEVEL_JTAG_ICERT_LOW, dbgPrintf(), ICERT_REG_DEBUG_CONTROL, and jtag_arm_IceRT_RegWrite().
| void jtag_arm_Mointor2DebugMode | ( | void | ) |
Leave Monitor mode and enter debug mode by putting the any Breakpoint
| - |
References convertDiffTimeToMsec, DBG_LEVEL_JTAG_ICERT_LOW, dbgPrintf(), error_exit_code, ICERT_REG_DEBUG_CONTROL, ICERT_REG_DEBUG_STATUS, ICERT_REG_WATCHPOINT_0_ADDRMASK, ICERT_REG_WATCHPOINT_0_CONTROL, ICERT_REG_WATCHPOINT_0_CONTROLMASK, ICERT_REG_WATCHPOINT_0_DATAMASK, jtag_arm_IceRT_RegRead(), jtag_arm_IceRT_RegWrite(), jtag_eos(), transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, icert::watchpoint0, and icert::watchpoint1.
Referenced by atmelFlashClearGPNVM(), atmelFlashErase(), atmelFlashEraseAndProgram(), atmelFlashLock(), atmelFlashProgramOnly(), atmelFlashSetGPNVM(), atmelFlashUnlock(), gdb_check_memory_block(), gdb_dcc_dummy(), gdb_read_memory_block(), gdb_writeback_memory_block(), philipsFlashEraseAllUnlocked(), philipsFlashLock(), philipsFlashProgram(), philipsFlashUnlock(), prog_flash_amd16(), prog_flash_amd32(), prog_flash_amd8(), str7FlashErase(), str7FlashProgram(), str9FlashErase(), and str9FlashProgram().