jt_arm9.c File Reference

#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <stdio.h>
#include "dbg_msg.h"
#include "arm_emu.h"
#include "jt_arm.h"
#include "jt_mmu.h"
#include "jt_instr.h"

Functions

Variables

Detailed Description

ARM9TDMI Interface
The ARM9TDMI core uses scan chain 1 with a wide of 67 bits (with 32 bit instr, 32 bit data and 3 bit control) to send instructions and exchange data values to the debug unit.

Function Documentation

void jtag_arm9_ReadCpuRegs ( int  reset_inst_counter,
int  status 
)

Read out ARM CPU core registers R0..R15 and CPSR.
The values are stored inside of the global structure named CPU.

Parameters:
status indicate if machine enter debug state from ARM or THUMB mode
reset_inst_counter try to reset PC (currently not done)
Returns:
-

References ARM_LD_R0_PC, ARM_MOV, ARM_MRS_R0_CPSR, ARM_MRS_R0_SPSR, ARM_NOP, ARM_STMIA, ARM_STMIA_BANK, ARM_STR, reg_set::CPSR, CPU, CPU_CPSR_FLAG_THUMB, CPU_CPSR_MODE_ABORT, CPU_CPSR_MODE_FIQ, CPU_CPSR_MODE_FLAGS, CPU_CPSR_MODE_IRQ, CPU_CPSR_MODE_SVC, CPU_CPSR_MODE_UNDEF_INSTR, DBG_LEVEL_GDB_ARM_INFO, dbgPrintf(), DEBUG_REPEAT_SPEED, DEBUG_SPEED, expect_cpsr_after_step, expect_modified_pc_after_step, expect_pc_after_step, reg_set::ext, jtag_arm9_mov_chain1_data(), jtag_arm_chain1_sysspeed_restart(), jtag_eos(), reg_set::RegExt::RegV4Ext::lr_usr, transaction::parameter, reg_set::RegExt::RegV4Ext::prev_CPSR, reg_set::Regs::r, reg_set::RegExt::RegV4Ext::r10_usr, reg_set::RegExt::RegV4Ext::r11_usr, reg_set::RegExt::RegV4Ext::r12_usr, reg_set::RegExt::RegV4Ext::r8_usr, reg_set::RegExt::RegV4Ext::r9_usr, READ_WRITE, reg_set::regs, reg_set::RegExt::RegV4Ext::sp_usr, reg_set::RegExt::RegV4Ext::SPSR, SYSTEM_SPEED, THUMB_BX_PC, THUMB_MOV_R0_PC, THUMB_NOP, THUMB_STR, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transaction::uplevel, reg_set::RegExt::v4, and WRITE_ONLY.

Referenced by jtag_arm_ReadCpuRegs().

void jtag_arm9_WriteCpuRegs ( void   ) 

Write back the stored CPU register to the ARM core.
(This function is used for test only.)

Parameters:
- 
Returns:
-

References ARM_LDMIA, ARM_NOP, CPU, DEBUG_REPEAT_SPEED, DEBUG_SPEED, jtag_arm9_mov_chain1_data(), reg_set::Regs::r, reg_set::regs, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_WriteCpuRegs().

void jtag_arm9_PrepareExitDebug ( void   ) 

Write back the stored CPU register to the ARM core and restart execution to continue the current program.

-- note on exit we messed up the PC so we can't access the Memory within the debug state.
But we can correct this next time we read out the CPU register

Parameters:
- 
Returns:
-

References ARM_BX_R0, ARM_LD_R0_PC, ARM_LDMIA, ARM_MSR_CPSR_R0, ARM_NOP, reg_set::CPSR, CPU, CPU_CPSR_FLAG_THUMB, DEBUG_REPEAT_SPEED, DEBUG_SPEED, jtag_arm9_mov_chain1_data(), reg_set::Regs::r, reg_set::regs, SYSTEM_SPEED, THUMB_LD_R0_PC, THUMB_NOP, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_PrepareExitDebug().

void jtag_arm9_Step ( uint32_t  next_instr  ) 

Single step (ARM9TDMI)
Write back the stored CPU register to the ARM core and execute one instruction.
The instruction has to be executed is given in next_instr.

Parameters:
next_instr ARM or THUMB instruction to execute
Returns:
-

References ARM_BX_R0, ARM_LD_R0_PC, ARM_LDMIA, ARM_MSR_CPSR_R0, ARM_NOP, reg_set::CPSR, CPU, CPU_CPSR_FLAG_THUMB, CPU_CPSR_MODE_FLAGS, DBG_LEVEL_GDB_ARM_INFO, dbgPrintf(), DEBUG_REPEAT_SPEED, DEBUG_SPEED, expect_cpsr_after_step, expect_modified_pc_after_step, expect_pc_after_step, jt_arm_instr_access_mem(), jt_arm_instr_modifys_PC(), jt_thumb_instr_modifys_PC(), jtag_arm9_mov_chain1_data(), reg_set::Regs::r, reg_set::regs, SYSTEM_SPEED, THUMB_LD_R0_PC, THUMB_NOP, thumb_step_emu(), transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_Step().

void jtag_arm9_ResynchStep ( void   ) 

Resynch. step at ARM9TDMI.
Write back some of the stored CPU register to the ARM core and execute one "b ." instruction.

Parameters:
- 
Returns:
-

References ARM_B_dot, ARM_LD_R0_PC, ARM_LDMIA, ARM_MSR_CPSR_R0, ARM_NOP, reg_set::CPSR, CPU, CPU_CPSR_FLAG_FIQ_DISABEL, CPU_CPSR_FLAG_IRQ_DISABEL, CPU_CPSR_FLAG_JAZELLE, CPU_CPSR_FLAG_THUMB, CPU_CPSR_MODE_ABORT, CPU_CPSR_MODE_FIQ, CPU_CPSR_MODE_FLAGS, CPU_CPSR_MODE_IRQ, CPU_CPSR_MODE_SVC, CPU_CPSR_MODE_SYSTEM, CPU_CPSR_MODE_UNDEF_INSTR, CPU_CPSR_MODE_USER, DEBUG_REPEAT_SPEED, DEBUG_SPEED, jtag_arm9_mov_chain1_data(), jtag_arm_chain1_sysspeed_restart(), SYSTEM_SPEED, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_ResynchStep().

void jtag_arm9_ReadWordMemory ( uint32_t  address,
int  howmanywords,
uint32_t *  buf 
)

Read out word memory into the given buffer.


Max read speed : 9 Kbytes/sec

Parameters:
address target machine address (memory at ARM side)
howmanywords number of words to read
buf pointer to destination read buffer (memory at server side)
Returns:
-

References ARM_LD_R0_PC, ARM_LDMIA, ARM_LDMIA_UPDATE, ARM_NOP, ARM_STMIA, DBG_LEVEL_GDB_ARM_INFO, dbgPrintf(), DEBUG_REPEAT_SPEED, DEBUG_SPEED, jtag_arm9_mov_chain1_data(), jtag_arm_chain1_sysspeed_restart(), transaction::parameter, READ_WRITE, SYSTEM_SPEED, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_ReadWordMemory().

uint32_t jtag_arm9_ReadWord ( uint32_t  address  ) 

32 Bit Word Read
CPU must be in debug state

Parameters:
address target machine address (memory at ARM side)
Returns:
32 bit read value

References ARM_LD_R0_PC, ARM_LDMIA, ARM_NOP, ARM_STMIA, DBG_LEVEL_JTAG_ARM_LOW, dbgPrintf(), DEBUG_REPEAT_SPEED, DEBUG_SPEED, jtag_arm9_mov_chain1_data(), jtag_arm_chain1_sysspeed_restart(), transaction::parameter, READ_WRITE, SYSTEM_SPEED, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_ReadWord().

uint32_t jtag_arm9_ReadHalfword ( uint32_t  address  ) 

16 Bit Halfword Read

Parameters:
address target machine address (memory at ARM side)
Returns:
16 bit read value

References ARM_LD_R0_PC, ARM_LDRH, ARM_NOP, ARM_STMIA, DBG_LEVEL_JTAG_ARM_LOW, dbgPrintf(), DEBUG_REPEAT_SPEED, DEBUG_SPEED, jtag_arm9_mov_chain1_data(), jtag_arm_chain1_sysspeed_restart(), transaction::parameter, READ_WRITE, SYSTEM_SPEED, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_ReadHalfword().

uint32_t jtag_arm9_ReadByte ( uint32_t  address  ) 

8 Bit Byte Read

Parameters:
address target machine address (memory at ARM side)
Returns:
8 bit read value

References ARM_LD_R0_PC, ARM_LDRB, ARM_NOP, ARM_STMDA, DBG_LEVEL_JTAG_ARM_LOW, dbgPrintf(), DEBUG_REPEAT_SPEED, DEBUG_SPEED, jtag_arm9_mov_chain1_data(), jtag_arm_chain1_sysspeed_restart(), transaction::parameter, READ_WRITE, SYSTEM_SPEED, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_ReadByte().

void jtag_arm9_WriteWord ( uint32_t  address,
uint32_t  value 
)

32-bit memory write

Parameters:
address target machine address (memory at ARM side)
value 32 bit value to write
Returns:
-

References ARM_LDMIA, ARM_NOP, ARM_STMDA, DEBUG_REPEAT_SPEED, DEBUG_SPEED, jtag_arm9_mov_chain1_data(), jtag_arm_chain1_sysspeed_restart(), SYSTEM_SPEED, transactionActivate(), transactionCreate(), transactionErase(), transactionGet(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_WriteWord().

void jtag_arm9_WriteHalfword ( uint32_t  address,
uint16_t  value 
)

16-bit memory write

Parameters:
address target machine address (memory at ARM side)
value 16 bit value to write
Returns:
-

References ARM_LDMIA, ARM_NOP, ARM_STRH, DEBUG_REPEAT_SPEED, DEBUG_SPEED, jtag_arm9_mov_chain1_data(), jtag_arm_chain1_sysspeed_restart(), SYSTEM_SPEED, transactionActivate(), transactionCreate(), transactionErase(), transactionGet(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_WriteHalfword().

void jtag_arm9_WriteByte ( uint32_t  address,
uint16_t  value 
)

8-bit memory write

Parameters:
address target machine address (memory at ARM side)
value 8 bit value to write
Returns:
-

References ARM_LDMIA, ARM_NOP, ARM_STRB, DEBUG_REPEAT_SPEED, DEBUG_SPEED, jtag_arm9_mov_chain1_data(), jtag_arm_chain1_sysspeed_restart(), SYSTEM_SPEED, transactionActivate(), transactionCreate(), transactionErase(), transactionGet(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_WriteByte().

void jtag_arm9_WriteMemoryBuf ( uint32_t  address,
int  howmanywords,
uint32_t *  buf 
)

Write back word memory from the given buffer.

Parameters:
address target machine address (memory at ARM side)
howmanywords number of words to read
buf pointer to source write buffer (memory at server side)
Returns:
-

References ARM_LDMIA, ARM_NOP, ARM_STMIA, DEBUG_REPEAT_SPEED, DEBUG_SPEED, jtag_arm9_mov_chain1_data(), jtag_arm_chain1_sysspeed_restart(), SYSTEM_SPEED, transactionActivate(), transactionCreate(), transactionErase(), transactionGet(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_WriteMemoryBuf().

void jtag_arm9_RunProgram ( uint32_t  address  ) 

Start execution of a program at a given address.

Parameters:
address target machine address (memory at ARM side)
Returns:
-

References ARM_LD_R0_PC, ARM_MOV, ARM_MSR_CPSR_R0, ARM_NOP, reg_set::CPSR, CPU, CPU_CPSR_FLAG_FIQ_DISABEL, CPU_CPSR_FLAG_IRQ_DISABEL, CPU_CPSR_FLAG_JAZELLE, CPU_CPSR_FLAG_THUMB, CPU_CPSR_MODE_ABORT, CPU_CPSR_MODE_FIQ, CPU_CPSR_MODE_FLAGS, CPU_CPSR_MODE_IRQ, CPU_CPSR_MODE_SVC, CPU_CPSR_MODE_SYSTEM, CPU_CPSR_MODE_UNDEF_INSTR, CPU_CPSR_MODE_USER, DEBUG_REPEAT_SPEED, DEBUG_SPEED, jtag_arm9_mov_chain1_data(), SYSTEM_SPEED, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_RunProgram().

Variable Documentation

uint32_t expect_cpsr_after_step[CPU_CPSR_MODE_FLAGS+1] [static]

XXX terrible hack for , ARM9TDMI soft core
it seems that we are loseing N- and Z- CPSR-Flags
so let the thumb_step_emu calculate them (or expect they are unchanged)
if we should use the emulating result based on an expected PC after the step, or it base on an expected modification (e.g. done by return).

Referenced by jtag_arm9_ReadCpuRegs(), and jtag_arm9_Step().

uint32_t expect_pc_after_step[CPU_CPSR_MODE_FLAGS+1] [static]

helper for expect_cpsr_after_step

Referenced by jtag_arm9_ReadCpuRegs(), and jtag_arm9_Step().

char expect_modified_pc_after_step[CPU_CPSR_MODE_FLAGS+1] [static]

helper for expect_cpsr_after_step

Referenced by jtag_arm9_ReadCpuRegs(), and jtag_arm9_Step().

This file is part of the documentation for JTAG-GDB Server for ARM .
Generated on Mon Feb 15 21:23:21 2010 by doxygen 1.6.2.