jt_arm7.c File Reference

#include <stdlib.h>
#include <string.h>
#include <unistd.h>
#include <stdio.h>
#include "dbg_msg.h"
#include "arm_emu.h"
#include "jt_arm.h"
#include "jt_mmu.h"
#include "jt_instr.h"

Functions

void jtag_arm7_ReadCpuRegs (int reset_inst_counter, int status)
void jtag_arm7_WriteCpuRegs (void)
void jtag_arm7_PrepareExitDebug (void)
void jtag_arm7_Step (uint32_t next_instr)
void jtag_arm7_ResynchStep (void)
void jtag_arm7_ReadWordMemory (uint32_t address, int howmanywords, uint32_t *buf)
uint32_t jtag_arm7_ReadWord (uint32_t address)
uint32_t jtag_arm7_ReadHalfword (uint32_t address)
uint32_t jtag_arm7_ReadByte (uint32_t address)
void jtag_arm7_WriteWord (uint32_t address, uint32_t value)
void jtag_arm7_WriteHalfword (uint32_t address, uint16_t value)
void jtag_arm7_WriteByte (uint32_t address, uint16_t value)
void jtag_arm7_WriteMemoryBuf (uint32_t address, int howmanywords, uint32_t *buf)
void jtag_arm7_RunProgram (uint32_t address)

Detailed Description

ARM7TDMI Interface
The ARM7TDMI core uses scan chain 1 with a wide of 33 bits to send instructions and exchange data values to the debug unit.

Function Documentation

void jtag_arm7_ReadCpuRegs	(	int	reset_inst_counter,
		int	status
	)

Read out ARM CPU core registers R0..R15 and CPSR.
The values are stored inside of the global structure named CPU.

Parameters:

	status	indicate if machine enter debug state from ARM or THUMB mode
	reset_inst_counter	try to reset PC

Returns:: -

Referenced by jtag_arm_ReadCpuRegs().

void jtag_arm7_WriteCpuRegs ( void )

Write back the stored CPU register to the ARM core.
(This function is used for test only.)

Parameters:

-

Returns:: -

References ARM_LDMIA, ARM_NOP, CPU, DEBUG_REPEAT_SPEED, DEBUG_SPEED, jtag_arm7_mov_chain1_data(), reg_set::Regs::r, reg_set::regs, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_WriteCpuRegs().

void jtag_arm7_PrepareExitDebug ( void )

Write back the stored CPU register to the ARM core and restart execution to continue the current program.

-- note on exit we messed up the PC so we can't access the Memory within the debug state.
But we can correct this next time we read out the CPU register

Parameters:

-

Returns:: -

References ARM_BX_R0, ARM_LD_R0_PC, ARM_LDMIA, ARM_MSR_CPSR_R0, ARM_NOP, reg_set::CPSR, CPU, CPU_CPSR_FLAG_THUMB, DEBUG_REPEAT_SPEED, DEBUG_SPEED, jtag_arm7_mov_chain1_data(), reg_set::Regs::r, reg_set::regs, RESTART_SPEED, SYSTEM_SPEED, THUMB_LD_R0_PC, THUMB_NOP, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_PrepareExitDebug().

void jtag_arm7_Step ( uint32_t next_instr )

Single step (ARM7TDMI)
Write back the stored CPU register to the ARM core and execute one instruction.
The instruction has to be executed is given in next_instr.

Parameters:

next_instr

ARM or THUMB instruction to execute

Returns:: -

References ARM_BX_R0, ARM_LD_R0_PC, ARM_LDMIA, ARM_MSR_CPSR_R0, ARM_NOP, reg_set::CPSR, CPU, CPU_CPSR_FLAG_THUMB, DBG_LEVEL_GDB_ARM_INFO, dbgPrintf(), DEBUG_REPEAT_SPEED, DEBUG_SPEED, jt_arm_instr_access_mem(), jt_arm_instr_modifys_PC(), jt_thumb_instr_access_mem(), jt_thumb_instr_modifys_PC(), jtag_arm7_mov_chain1_data(), reg_set::Regs::r, reg_set::regs, SYSTEM_SPEED, THUMB_LD_R0_PC, THUMB_NOP, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_Step().

void jtag_arm7_ResynchStep ( void )

Resynchronize step at ARM7TDMI.
Write back some of the stored CPU register to the ARM core and execute one "b ." instruction.

Parameters:

-

Returns:: -

References ARM_B_dot, ARM_LD_R0_PC, ARM_LDMIA, ARM_MSR_CPSR_R0, ARM_NOP, reg_set::CPSR, CPU, CPU_CPSR_FLAG_FIQ_DISABEL, CPU_CPSR_FLAG_IRQ_DISABEL, CPU_CPSR_FLAG_JAZELLE, CPU_CPSR_FLAG_THUMB, CPU_CPSR_MODE_ABORT, CPU_CPSR_MODE_FIQ, CPU_CPSR_MODE_FLAGS, CPU_CPSR_MODE_IRQ, CPU_CPSR_MODE_SVC, CPU_CPSR_MODE_SYSTEM, CPU_CPSR_MODE_UNDEF_INSTR, CPU_CPSR_MODE_USER, DEBUG_REPEAT_SPEED, DEBUG_SPEED, jtag_arm7_mov_chain1_data(), reg_set::Regs::r, reg_set::regs, SYSTEM_SPEED, transactionActivate(), transactionCreate(), transactionErase(), transactionExecute(), transactionGet(), transactionPenting(), transaction::uplevel, and WRITE_ONLY.

Referenced by jtag_arm_ResynchStep().

void jtag_arm7_ReadWordMemory	(	uint32_t	address,
		int	howmanywords,
		uint32_t *	buf
	)

Read out word memory into the given buffer.

Max read speed : 19 Kbytes/sec

Parameters:

	address	target machine address (memory at ARM side)
	howmanywords	number of words to read
	buf	pointer to destination read buffer (memory at server side)